SN74LS107ADR Details_SN74LS107ADR PDF Document_Texas Instruments-Galaxy Core City

Logic - Flip Flops

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Specifications

Description	Details
Series	74LS
Package	Bulk
Function	Master Reset
Type	JK Type
Output Type	Complimentary
Number of Elements	2
Number of Bits per Element	1
Clock Frequency	45 MHz
Max Propagation Delay @ V, Max CL	20ns @ 5V, 15pF
Trigger Type	Negative Edge
Current - Output High, Low	400µA, 8mA
Voltage - Supply	4.75V ~ 5.25V
Current - Quiescent (Iq)	6 mA
Input Capacitance	-
Operating Temperature	0°C ~ 70°C (TA)
Mounting Type	Surface Mount
Supplier Device Package	14-SOIC
Package / Case	14-SOIC (0.154", 3.90mm Width)

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